/*
 * SPDX-FileCopyrightText: Sebastiano Barezzi
 * SPDX-License-Identifier: Apache-2.0
 */

package com.xyzshell.andinfo.libs.cpu.models

import com.xyzshell.andinfo.libs.cpu.models.Midr
import com.xyzshell.andinfo.libs.cpu.models.Uarch

/**
 * `struct cpuinfo_uarch_info`
 * CPU微架构信息结构体
 */
data class UarchInfo(
    /**
     * Type of CPU microarchitecture
     * CPU微架构类型
     */
    val uarch: Uarch,

    /**
     * Value of CPUID leaf 1 EAX register for the microarchitecture
     * 该微架构的CPUID leaf 1 EAX寄存器值（x86专用）
     */
    val cpuid: UInt?,

    /**
     * Value of Main ID Register (MIDR) for the microarchitecture
     * 该微架构的主ID寄存器（MIDR）值（ARM专用）
     */
    val midr: Midr?,

    /**
     * Number of logical processors with the microarchitecture
     * 使用此微架构的逻辑处理器数量
     */
    val processorCount: UInt,

    /**
     * Number of cores with the microarchitecture
     * 使用此微架构的核心数量
     */
    val coreCount: UInt,
) {
    companion object {
        @JvmStatic
        fun fromCpuInfo(
            uarch: Int,
            cpuId: Int,
            midr: Int,
            processorCount: Int,
            coreCount: Int,
        ) = UarchInfo(
            Uarch.fromCpuInfo(uarch),
            cpuId.takeUnless { it == 0 }?.toUInt(),
            midr.takeUnless { it == 0 }?.let { Midr.fromCpuInfo(it) },
            processorCount.toUInt(),
            coreCount.toUInt(),
        )
    }
}
